VLSI
TAP and TAP Controller – VLSI Tutorials
JTAG - 技术概览- XJTAG
Boundary-scan hardware controllers
Securing the JTAG Interface | ASSET InterTech
JTAG(Joint Test Action Group) Wiki - FPGAkey
a)JTAG TAP state machine, (b)Simplified ProASIC3 security | Download Scientific Diagram
The JTAG Test Access Port (TAP) State Machine - Technical Articles
VLSI
The state machine of the JTAG TAP controller. | Download Scientific Diagram
3203 - JTAG - General description of the TAP Controller states
fpga4fun.com - JTAG 2 - How JTAG works
The many faces of the JTAG interface port – JTAG
Training JTAG Interface
2.1.2. JTAG Chip Architecture
JTAG - SEGGER Wiki
Technical Guide to JTAG - Corelis JTAG Tutorial
2.1.2. JTAG Chip Architecture
fpga4fun.com - JTAG 2 - How JTAG works
File:JTAG TAP Controller State Diagram.svg - Wikimedia Commons
OpenOCD: OpenOCD JTAG Primer
Technical Guide to JTAG - Corelis JTAG Tutorial
Boundary scan - Wikipedia
JTAG IEEE 1149.1 Standard WG
Technical Guide to JTAG - XJTAG Tutorial
JTAG Bus Description and Pinout
